Mr. Peter Copetti reports

POET TECHNOLOGIES MOVES TO NEXT PHASE OF COMMERCIALIZATION PLAN, ENDORSES RECOMMENDATIONS OF SPECIAL STRATEGIC COMMITTEE

Poet Technologies Inc.'s board of directors has endorsed the next phases of the company's commercialization plan put forward by the special strategic committee (SSC) chaired by executive director Peter Copetti.

The multipronged approach is based on discussions with potential industry partners and advisers regarding the company's two key markets, consisting of the military and commercial sectors, that have been identified as potential early adopters of the Poet platform. Currently, while Poet's incorporation in military projects is proceeding well and should provide value in several key verticals, significant value exists in adapting Poet for mass production within a commercial semiconductor fab environment. The company must rapidly move to the next phase of its commercialization plan, which includes addressing feature size and scalability requirements for commercial fabs.

The board has therefore endorsed and authorized the SSC to proceed on these recommendations, including:

• Establishing a Poet development alliance (PDA): The company will be establishing relationships with one or more industrial partners looking toward jointly adapting Poet to commercial scale III-V implementation. Alliance partners will provide key input including intellectual assets, technical staff, manufacturing capability and foundry resources. In addition to optimizing device parameters and yields, a near-term goal will be to establish comprehensive design rules and a device parameter library for Poet, which will proliferate licensed designs in a Poet device ecosystem.
• Drive for reduction of feature size to 100-nanometre range: The company will reprioritize its technical road map by introducing specific milestones associated with reducing feature size from the submicron to the 100-nanometre range in scale, targeting the fourth quarter of 2013 for that milestone. Consequently, the milestone for full optoelectronic integration on a single die will be rescheduled to the second quarter of 2014. Even without this full integration milestone, the 100-nanometre goal anticipates the cadence of commercial III-V foundry capabilities. This road map will focus the company's Odis subsidiary on developmental work that will allow for scalable production within existing commercial fabs.
• Adoption of a shareholder rights plan (SRP): The company will be structuring a special SRP to protect the potential value of the company, for all shareholders, during the period where discussions with potential partners may be taking place regarding PDA-related agreements, and as progress on the 100-nanometre project continues.

"This move crystallizes the company's strategy for unlocking the value of our intellectual property," said Mr. Copetti. "A development alliance with the right partners will definitely shorten time to market and help evolve a design ecosystem for Poet in the marketplace."

Further SSC actions will be endorsed by the board depending on the status of the above initiatives.

Mr. Copetti added: "While the new feature-size milestone is a challenge given our commitment to projects in our delivery pipeline, I believe the Poet team is more than capable of achieving this goal. There is no doubt that Poet can demonstrate its n- and p-channel capability to be a viable and scalable complement to silicon CMOS (complementary metal-oxide semiconductor)."

The company's proprietary Poet platform has demonstrated monolithic fabrication of integrated circuit gallium arsenide-based devices containing both electronic and optical elements on a single wafer.

By offering components with the potential for increased speed, density, reliability and lower costs, Poet offers the semiconductor industry the ability to push Moore's Law to the next cadence level, overcoming current silicon-based bottlenecks and potentially changing the road map for a broad range of applications.

The Poet platform is currently the basis for a number of key projects -- including optical code division multiple access (OCDMA) devices for avionics systems, combined RF-/optical-phased arrays, optoelectronic directional couplers and ultra-low-power random access memory (RAM).

We seek Safe Harbor.