New clock IC enables the unique functionality of the JESD204B SERDES
high-speed interface
Company Website:
http://www.analog.com
NORWOOD, Mass. -- (Business Wire)
Analog
Devices, Inc. (NASDAQ: ADI) introduced today the AD9528 JESD204B
clock and SYSREF generator defined to support the clock requirements for
long-term evolution (LTE) and multicarrier GSM base station designs,
defense electronics systems, RF test instrumentation, and other emerging
wideband RF GSPS data acquisition signal chains. The use of the JESD204B
standard for the high-speed converter-to-digital processor interface is
becoming increasingly prevalent across many state-of-the-art
applications as data rates are being pushed into the multi-Gb/s range,
and multi-channel synchronization and data latency management are
becoming a system necessity. The JESD204B interface was specifically
developed to address high-data rate system design needs, and the AD9528
clock device contains functions that support and enhance the unique
capabilities of that interface standard.
The AD9528 provides a low-power, multi-output, clock distribution
function with low-jitter performance, along with an on-chip, two-stage
PLL and VCO. The on-chip VCO tunes from 3.6 GHz to 4.0 GHz, with the
input receivers and oscillator providing both single-ended and
differential operation.
The AD9528 provides JESD204B-compatible subclass 1 SYSREF and
deterministic latency clocking signals and supports a variety of options
for SYSREF signal generation. The most basic is a simple buffer function
wherein the user-provided SYSREF signal is fanned out to the SYSREF
output pins. When provided with an external SYSREF source, the AD9528 is
also capable of synchronizing the SYSREF outputs to the clock outputs
being generated internally, which is necessary to achieve accurate
deterministic latency. The AD9528 is also capable of generating the
SYSREF source internally. The AD9528 supports both continuous signal
SYSREF generation and “n-shot” pulse generation. N-shot generation is
vital in systems where a continuous signal might result in unwanted
spurs in the output spectrum of the data converter being clocked.
When connected to a recovered system reference clock and a VCXO, the
AD9528 generates 12 low-noise outputs with a range of 1 MHz to 400 MHz,
and two high-speed outputs at up to 1.25 GHz. The frequency and phase of
one clock output relative to another clock output can be varied by means
of a divider phase-select function that serves as a jitter-free, coarse
timing adjustment in increments that are equal to half the period of the
signal coming from the VCO output. The SYSREF signals each have
additional phase offset capability making it easy to dial-in the optimal
arrival time at each target device.
Pricing and Availability
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AD9528BCPZ
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NOW
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NOW
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$8.25
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72-lead LFCSP
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AD9528/PCBZ
Evaluation Board
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NOW
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NOW
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$190.00
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n/a
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The AD9528 can be designed into wideband RF data acquisition
applications with ADI’s AD9680
dual-channel, 14-bit, 1.0-GSPS JESD204B A/D converter.
About Analog Devices
Innovation, performance, and excellence are the cultural pillars on
which Analog Devices has built one of the longest standing, highest
growth companies within the technology sector. Acknowledged
industry-wide as the world leader in data conversion and signal
conditioning technology, Analog Devices serves over 100,000 customers,
representing virtually all types of electronic equipment. Analog Devices
is headquartered in Norwood, Massachusetts, with design and
manufacturing facilities throughout the world. Analog Devices is
included in the S&P 500 Index.
EngineerZone is a trademarked term of Analog Devices, Inc.
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Contacts:
EDITORS ONLY CONTACT:
Analog Devices Inc.
Linda
Kincaid, 781-937-1472
linda.kincaid@analog.com
or
Porter
Novelli
Andrew MacLellan, 617-897-8270
andrew.maclellan@porternovelli.com
Source: Analog Devices, Inc.
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